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Altera_Forum
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17 years ago

Max II CPLD configuration question

I'm new to CPLD and now I am reading Max II CPLD document. Here is my question: After CPLD is programed, the CPLD is powered down and then powered up. How is the configuration updated from fla...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

CPLD configuration circuitry is non-volatile(based on EPROM or EEPROM or fuse or antifuse), program is not lost on power down. Once configured thats it. You don't need flash or any external memory for that.

Most FPGA configuration circuitry based on SRAM and are volatile