MAX 10 using on chip flash with Nios II

Now I am getting a timeout during the UFM write. I am also experiencing pretty flaky behavior when writing to UFM. When I compile the design I get the following timing warning in the quartus messages.

Warning (332056): PLL cross checking found inconsistent PLL clock settings:

Warning (332056): Node: u0|onchip_flash_0|altera_onchip_flash_block|ufm_block|osc was found missing 1 generated clock that corresponds to a base clock with a period of: 181.818