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SRode1's avatar
SRode1
Icon for New Contributor rankNew Contributor
5 years ago

Max 10 performance degradation of ADC when ignoring I/O usage restriction

The GPIO User Guide states only about 40% of the I/Os are available when using the internal ADC of the MAX 10 in E144 package with I/O voltage of 3.3V. Quartus states that the pin placement will caus...
ShafiqY_Intel's avatar
ShafiqY_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi SRode1,

For package E144:

  • Cannot be used as GPIO pins = Bank 1A, 1B, 2, and 8
  • Can be used as GPIO pins = Banks 4 and 6
  • Can be used as a percentage of GPIO pins = Banks 3(39%), 5(83%), and 7(39%)

Since you are using voltage of 3.3V, your I/O standard is in Group 4.

Therefore, the percentage of GPIO pins allowed is Bank 3(39%), Bank 5(83%), and Bank 7(39%).

Noted: The Intel Quartus Prime software will issue a critical warning if this I/O settings violated.

Thanks