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JayHarikumaran's avatar
JayHarikumaran
Icon for Occasional Contributor rankOccasional Contributor
4 years ago

MAX 10 JAM player programming failure

Hello, I had raised this issue before. The question was unfortunately closed off without a solution. https://community.intel.com/t5/Programmable-Devices/JAM-Player-exit-code-10-Device-Programmi...
BDarji's avatar
BDarji
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Hello @JayHarikumaran and @dabo Dabo,

Thank you very much for sharing your experience here. It was really helpful to us. We got success to program internal flash of Max 10 FPGA by using steps mentioned here.

We also took some reference from AN904 (1. Intel® MAX® 10 Hitless Update Implementation Guidelines ).

Our target device was 10M08SCU169C8G.

We followed the steps mentioned below:

  1. Created IPS file as mentioned in section 1.5.1 in AN904.
    1. Used POF file. (This POF was generated along with SOF file when Quartus design was compiled.)
    2. We didn't make any change in pin state in ISP Clamp State Editor.
  2. Generated .JBC file as mentioned in section 1.6.1 in AN904.
    1. While doing this, we selected option to Enable real-time ISP to allow background programming when available
    2. Also selected ISP Clamp option.
  3. While calling jbi_execute function, we selected PROGRAM action.
  4. Once programming was done, we applied power cycle. And in next cycle, we noticed that FPGA was configured from internal flash!

Note: .jbc file created without 'Enable real-time ISP to allow background programming when available' didn't work and its file size was also more compared to jbc file created with this option on. Jay also mentioned about file size in this his post.

Have a Great Day!

Cheers,

Bhaumik