Max 10 dac output

Your code is a bit hard to read due to formatting. But in state "000" you have:

RDATA(23 DOWNTO 0)<="00000011"&DATA; 

which as I read the DAC8551 data sheet "7.4.1 Power-Down Modes" puts the DAC in High-Z mode. You probably want normal operation (ie "00" instead of "11" for bits 17 and 16). Also, it looks like the DIN is transferred on the falling edge of SCLK, not the rising edge.

Note, most people would use an enumerated type for the state instead of a std_logic_vector. If you really want to output it to the USER_LED, there is a convoluted way to convert the state to a std_logic_vector, but you won't see anything at this speed anyway.

You have many things in the registered proc that should probably be in combinational logic. This makes it much simpler to see what the outputs are in a given state. For example, just drive DIN using:

    DIN <= RDATA(23) when SYNC = '0' else '0';

outside the process. Same for the other outputs of the state machine (ie SCLK and SYNC). The way you have it now, you have to remember that the changes do not take effect until the next clock cycle.

Many people would use two processes for the state machine instead of combinational logic as I've suggested.

There are many other issues with the code, but hope this helps as a start.