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Hi
I was trying to do "
triple speed ethernet with sgmii interface hardware test by using system console reference design". from Altera wiki (I am unable to post the link here - But this is the first link that google gives on searching the title "
triple speed ethernet with sgmii interface hardware test by using system console reference design")
I am using Terasic DE4 board. I changed the pin details to suit DE4 board and configured the device. Successfully programmed device in USB JTAG mode. Then, I opened system console in SOPC builder and tried to execute the config.tcl script.
I am getting the following error.
error: java.lang.RuntimeException: This transaction did not complete in 60 seconds. System Console is giving up.
while executing
"master_write_32 $jtag_master 0x400 0x00000000"
(file "tse_mac_config.tcl" line 98)
(file line 98)
invoked from within
"source tse_mac_config.tcl"
(file "config.tcl" line 112)
(file line 112)
invoked from within
"source config.tcl"
I am able to execute
"open_service master $jtag_master" command properly. But the command
master_write_32 $jtag_master 0x400 0x00000000 is failing.
I am assuming my JTAG connection is working since open_service_master succeeded. What could go wrong with writes ?
Also does the board need to have a JTAG Connector for using it in the way specified above?
Any pointers please?
Thanks in advance
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I had the same problem using Stratix V GX FPGA Development Kit. The reference design project I used was AN647_TSE_Single_Port_SGMII_Dev_SVGX_ACDS-12.0sp2.qar.
I opened an SR to Altera and their answer solved the problem. In my case, the signal CLK_IN had no pin assigned. This signal is the input to a PLL that feeds, among other things, the JTAG master in the Qsys system.
The solution was to assign this signal to a pin connected to an onboard 125 MHz clock. After that, it was possible to communicate with the design via System Console.
You're using a different dev kit, but the problem cause could be similar.
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