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agaripcan6223's avatar
agaripcan6223
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6 years ago

Manual fitting with chipplanner

Hi, I want to generate metastability-based true random numbers using a model where 256 R - S latches are connected in parallel, as in Figure 1. For this, I have to place the NAND gates that make up e...
IDeyn's avatar
IDeyn
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6 years ago

Hi agaripcan6223 !

In order to create such a design you need to exploit hand placing the LUTs.

Have you tried using Assignments - Location -> LAB combinational cell?

Other issue is to create LUT mask to behave as NAND gate - you need to create hand placed LUTs and change their LUT mask using Resource property editor.

I also need to say that your design is highly unrecommended in FPGAs, here you create clock gating and combinational loops.

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Best regards,

Ivan