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Altera_Forum
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17 years ago

Making smart FIFO ?!

Hello all, First, I wish you an happy new year! I need some help. For my project, I need to store data coming from external memory (DDR2) to internal memory (MRAM or M4K blocks). I ha...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

That sounds like a barrel shifter. It might not be the most efficient implementation, but Altera has the lpm_clshift megafunction for that. I don't see a pipelining option in the MegaWizard or on-line help, but maybe it could be broken up into a set of small lpm_clshift instances to implement pipelining like Rysc has in mind.