Honored ContributorHi,
I have a problem with the mega function LVDS_TX. Nothing is coming out of it! I check with SignalTap the "in" signal and they are good. It's for a DAC3282. I have 32 bit input, 8 channels output , deserialisation factor 4. The 32 bit came at 10Mhz, so the output data rate is 40Mbps. But the LVDS TX out is always '0'. I tested with fix value to tx in, but tx out also at '0'. Really need help!
Honored ContributorAre you using an internal PLL or external PLL? The being said, even if you use an external PLL and set it up incorrectly, you should see something toggling on the output. Is SignalTap using the same clock as the parallel clock for altlvds? (My guess is the clock isn't toggling, but if SignalTap is running off of it, then it is). Worst case, remove the altlvds block and just send some toggling data out to make sure that works.
Honored ContributorI tried with and without the external PLL, same result.
SignalTap show me all the signal correctly (also the other clock from the PLL), all exept the signals going out of the LVDS_TX. I also tried with the megafunction DDIO. The LVDS pin should be ok as I have Dataclkp/n and framep/n generated by a PLL. (read with a external oscilloscope). And if I put the output of a fifo on the 8 pin of the LVDS, I have something. I should miss something with this LVDS_TX.Honored ContributorAre you SignalTapping the output of the LVDS_TX block, or looking at it with a scope? I didn't think the LVDS output could drive back into SignalTap.
