Forum Discussion
Honored ContributorLVDS I/O termination
Is an external 100Ohm resistor required at the input of an LVDS receiver I/O pair for the Cyclone III devices? The literature seems to suggest yes and no. Also, if I have "rx_in" as a single-channel LVDS serial input to my deserializer on the FPGA, is it correct to assume that "rx_in", and its complement "rx_in(n)" which the fitter autmoatically assigns, will be converted into a single serial bitstream by the LVDS I/O pair and presented to my deserializer as one rx_in?
12 Replies
Altera_ForumThanks. In the Cyclone III Device Handbook, High Speed Differential I/O section, it was not clearly stated that an external 100Ohm resistor was required at the input of the LVDS receiver pins. There are clear statements about the requirement of external resistor networks for LVDS transmitter.
- Altera_Forum
Stratix and Arria have on-chip differential termination, Cyclone III (as other Cyclone family chips) hasn't. Where do you see a different statement in device literature?
The inverted input is assigned by the fitter automaticly, as you said. You have a single rx_in port pin representing the differential pair.
