LVDS clock outputs

Hi, Thanks for your reply.

Since the interface is DDR, I need to maintain the data-clock relationship. So, I need to constrain the each data with respect to their clock outputs. I don't use altlvds.

Just use regular I/O. You don't need those dedicated PLL outputs, and if it's source synchronous outputs, then you definitely don't want them as they don't match the data. (I see very high speed interfaces using regular I/O to send out clocks all the time.) Are you using altlvds?