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Altera_Forum
Honored Contributor
17 years agoLUT to change inputs of another module
Lets say I have two programs in Verilog, one the LUT and the other some logic circuit with a clock. Lets say in that circuit 'a', a1 is an output. a1 is input to the LUT and the output of the LUT is ...
Altera_Forum
Honored Contributor
17 years agoI am trying to create a multiplication block that uses a slower clock for less processor intensive applications. The slower clock needs to be inputted instantly or very quickly.
I am not sure what you are suggesting