Altera_ForumHonored Contributor17 years agoLUT to change inputs of another module Lets say I have two programs in Verilog, one the LUT and the other some logic circuit with a clock. Lets say in that circuit 'a', a1 is an output. a1 is input to the LUT and the output of the LUT is ...Show More
Altera_ForumHonored Contributor17 years agoA wire signal of suitable type is used to connect both modules. wire awire;
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