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Altera_Forum's avatar
Altera_Forum
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17 years ago

LUT to change inputs of another module

Lets say I have two programs in Verilog, one the LUT and the other some logic circuit with a clock. Lets say in that circuit 'a', a1 is an output. a1 is input to the LUT and the output of the LUT is ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

A wire signal of suitable type is used to connect both modules. 

wire  awire;