LUT hazards

In 2004, an authoritative source at Altera said, "The chips themselves guarantee that when a single input to a look-up table changes, the output will not glitch." This statement applied to all 4-input-LUT-based device families up through at least the original Stratix plus MAX II. I expect it is true for newer families with 4-input LUTs. I don't remember ever getting an answer about this specifically for families with ALUTs.

In the post at http://www.alteraforum.com/forum/showthread.php?p=7144, someone found an on-line solution that said more than one LUT input may change without a glitch on the output. I did not get a response from Altera when I asked if the solution is correct, but I have since then been told yet again by someone at Altera that you have to limit the number of changing inputs to just one changing input if you need to prevent glitches on a LUT output (like a LUT in a clock path or driving an asynchronous reset).