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Altera_Forum
Honored Contributor
Honored Contributorlpm_divider latency
Hi,
I am new in VHDL and Altera FPGA. I am currently working with a Cyclone III. I want to use the megafunction lpm_divide to do a signed 32 bit / signed 16 bit division. I read in the Altera documentation that the lpm_divide megafunction can be used without any clock-input. My question is: How do I get the time delay caused by the lpm_divide megafunction? In other words: How do I get the time a division 32bit/16bit will take? Do I have to use the Time Quest Analyzer? Thank you very much. Chris12 Replies
Altera_Forummy impression from post# 5 is that he's essentially trying to create a float from an integer, hence the suggestion of ALTFP_CONVERT
- Altera_Forum
Yes, post# 5 was my convoluted attempt at converting an integer to floating point.
