lpm_add_sub output bits - MSB or LSB?

Not sure if I understood the question but are you saying if you configured the A and B inputs to be 16 bits wide each and the result 16 bits wide what result bits would you get?

A 16 bit value + 16 bit value results in a 17 bit result due to carry over, lets call these bits [16..0] The result port of the LPM will give you bits [15..0] of the answer and [16] will wire up to the "cout" signal (carry out) So if you want the full 17 bits of resolution just combine the cout to the result like this (verilog):

assign full_result = {cout, result}; // one bit concatenated in front of 16 bits