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Altera_Forum
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17 years ago

Low Pass IIR filter using cyclone II FPGA

Hi everyone, I hava a task to implement low pass iir filter on cyclone II FPGA. The parameters of filter are the following: fp=5kHz; pass band frequency fs=8kHz; stop band frequency Fs=44k...
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Altera_Forum
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17 years ago

altmult_accum megafunction is mapped to Cyclone II hardware multiplier blocks plus regular logic for accumulator, it doesn't result in a different DSP implementation than generic HDL code. But you may find it helpful to structurize your code.