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I. A lot of old text books teams the two process method, but the apparent prefered method now is a single process.
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Yes it does, and Im sure its how many started, but you can easily fall into the latch trap.
As I understand the 2 process state machine is a throwback to very old compilers that could only cope with registers and logic in separate processes. But this hasnt been the case for a long time.
For anyone starting, I would always recommend a single process (it reads better in my mind too - more like software!)
To the OP - AFAIK, the same problems can also happen in verilog. So get googling.
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One-process state machines may seem to be the preferred method and will handle a lot of tasks but not all. Often you need combinatorial (non-registered) outputs and then the two-process is a lot easier to write and maintain than the 'one-process' where you have to anyway add that second process where you have to repeat most of the work to fabricate these combinatorial outputs. Most of my modules are ST-components for use in Qsys, and to handle the backpressure graciously you need combinatorial outputs. So Steffen, don't apologize. Two-process state machines are fine and certainly not out of fashion!
Regards,
Josy
Honored Contributor
