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Altera_Forum
Honored Contributor
Honored ContributorLooking at gate signals inside a block
So the problem is that I have a top level block diagram and I can of course make pins and check the inputs and outputs of the blocks when I do the simulation after compiling the design and making a v...
Altera_ForumHonored Contributor
Honored ContributorHello,
What about change the filter option in the node finder of the vector wafeform file: pins: all pins: all and register postfitting ... design entry all names. good luck.
