Logic lock

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What does "Back annotate the LogicLock Region" mean?

How to duplicate a logic lock region into many logic lock regions with the same logic, logic position and routing in the logic lock region?

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Hi Sylvest,

for your tasks I would use design partitions. I have a small project created, which could maybe help you to understand what I'm trying to explain. First I have a subproject created with a simple counter. After succesful P&R I have export the design as design partition. The counter is 4 times used in the toplevel project. These counters instances are also defined as design partitions. For the first run of the toplevel project you need a blackbox for the counter, in order to successful compile the project. Then you have to import the counter design and to define for which design partitons you will use the imported design (in this case for all counters). After import you can run the P&R again, with the setting preserve placement and routing.