Logic lock

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Hi,

you got it half and half...

Yes you export/import from lower level to higher level but you connect your ports as usual through your project build-up. The compiler will then know you want the locked module to be there.

This is similar to incremental compilation. I personally don't recommend either unless it is very necessary as it has its limitations e.g. yo can't use signaltap

(at least as far as I know).

kaz

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Hi Kaz,

I never heard that I can't use signaltap when using incremental compilation. My experience is that it works fine. In order to get the most benefit of incremental Compilation and signaltap you should choose only post-fitted nodes. in this case only the connection to signaltap are new routed. But you can also choose pre-synthesis nodes, but the P&R will take longer, you influence the sythesis and maybe your timing.