Lock a clock to a 8B10B data stream?

You don't necessarily need a dedicated timing signal to recover the clock signal. My understanding is that the GIGE protocol requires constant transmission of the alignment character. This means that data is constantly being sent. The receiver apparently inserts or removes "skip" characters but it lets you know when it does such a thing.

You could create your own timing signal once every 2000 received characters (would be 62.5kHz I believe). You likewise create a pulse that occurs once every 2000 clocks based on the reference clock. Then you basically need to adjust the reference clock to keep these two 62.5kHz signals locked (minimize the error between them). If your worst case difference between the two clocks were 100ppm, you would have a worst case error of 16ns (I think I did that right).

You can choose something of lower frequency as well but it must be consistent and remember the lower the frequency of the timing signal, the less accurately you'll be able to lock your reference clock to it (you'll have more wander). Basically between periods of timing signals you are guessing what needs to be done to adjust the reference clock (up, down, hold). I typically use a PID control loop for this.

Are you using a VCXO for your reference clock?

Jake