Lock a clock to a 8B10B data stream?

Thank you all for your reply!

If I understand this correctly:

1. When the receiver channel is configured for SDI mode, the rate match fifo is turned off and it provides the recovered clock as rx_clkout, from which we can use a PFD IP to control a external VCXO to lock the local clock onto the incoming data stream.

2. This is not feasible when the receiver channel is configured for GIGE mode because the rate match fifo is turned on.

3. Can I connect the 1.25Gbps 8B10B incoming data stream to two transreceiver blocks, one of them configurated as SDI, coupled with PFD and VCXO to generate a low jitter reference clock for the other transreceiver block configurated as GIGE? Are there anything I should be concerned? (I guess the extra power and signal integrity are among them but it seems to be feasible)

4. Any preferred way of doing this than the solution above?

Warmest regards!

Hua