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Altera_Forum
Honored Contributor
Honored ContributorLock a clock to a 8B10B data stream?
Hi there, I am trying to find a way to synchronize a chain of equipments but don't want to use a dedicated clock network. If I use the transrecivers in Arria II GX to implement GIGE protoc...
Altera_ForumHonored Contributor
Honored ContributorAs far as I understand, is rx_clkout the slow clock from receiver CDR PLL. But it's not accessible when using the rate matcher. This restriction is common to all Altera GX receiver designs due to the internal clock architecture.
Apart from the question, if the CDR clock output is accessible, I doubt, if it's suited as a TX reference clock by it's jitter specification.
