Forum Discussion
Hi Akash,
I copy the email thread from our college to here for better community understanding.
########################### EMAIL THREAD ####################################
As discussed on phone, I followed the steps till "make -j 48" command. I am attaching the tree log of u-boot-socfpga folder for your reference. The qar project is updated with 4 bit sd card peripheral.
Regards,
Akash.
From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>
To: "Akash Gupta" <AKASH.DEAL@GOV.IN>
Cc: "JS HYANKI" <js.hyanki.deal@gov.in>
Sent: Friday, December 1, 2023 8:18:03 AM
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
We can have call today.
Last two days I was quiet busy with Intel IFTD event in Bangalore.
Regards
Jeetesh
From: Akash Gupta <akash.deal@gov.in>
Sent: Wednesday, November 29, 2023 12:43 PM
To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images
Hi,
I used the same project and compiled it in Quartus Prime 18.1 and then followed this guide (which uses an old u-boot) to generate the preloader-mkpimage.bin, which I wrote as a preloader in a2 partition of sdcard. In addition, I wrote "hello-mkimage.bin" (a simple DS-5 project to display hello world over bare metal) as bootloader. Now the custom board boots up properly and log shows that SDRAM is detected.
The problem is that, after reset, sometimes the output showa complete "Hello World!" phrase, but other times it shows "He" or "He▒lo World!" (including a corrupted letter) or nothing. It is totally random in nature. I am attaching both logs for your reference. We programmed the board using sof also for testing but there is no change in the nature of output. If there had been a hardware problem or RAM was not configured properly in quartus project, this preloader would not have been able to detect the RAM. Please go through the logs. You can call me at 2 PM today if you are available, otherwise convey your suitable timings.
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About the linux booting using Quartus 22 as you and I were doing earlier, we had made few changes in the hardware and using the same project and method, now the error is changed to following:
U-Boot SPL 2022.04-gfda0d917-dirty (Nov 22 2023 - 14:12:39 +0530)
Trying to boot from MMC1
unable to select a mode
spl: mmc init failed with error: -524
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Earlier, it used to show "spl: partition error", but now it show "unable to select a mode."
Regards,
Akash.
From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>
To: "Akash Gupta" <AKASH.DEAL@GOV.IN>
Cc: "JS HYANKI" <js.hyanki.deal@gov.in>
Sent: Tuesday, November 28, 2023 12:03:05 PM
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
As discussed over the phone, I am getting the error while compilation. It looks DDR issue.
Please send the quartus 18 version project which you have tested with baremetal.
Regards
Jeetesh
From: Akash Gupta <akash.deal@gov.in>
Sent: Tuesday, November 21, 2023 10:17 AM
To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images
Hi,
Please find attached the project and error screenshot. The project was compiled using Quartus Prime 22. I have removed the "output_files" and "software" (for size purpose) folders as you will compile it again.
Regards,
Akash.
From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com>
To: "Akash Gupta" <AKASH.DEAL@GOV.IN>
Cc: "JS HYANKI" <js.hyanki.deal@gov.in>
Sent: Tuesday, November 21, 2023 4:43:18 AM
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
As discussed over phone, please send the quartus project so that we can also check our side.
Regards
Jeetesh
From: Tiwari, Jeetesh Kumar
Sent: Monday, November 20, 2023 12:17 PM
To: Akash Gupta <akash.deal@gov.in>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
We can have call today at 2:30PM.
Regards
Jeetesh
-----Original Message-----
From: Akash Gupta <akash.deal@gov.in>
Sent: Monday, November 20, 2023 11:43 AM
To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi,
I and Hyanki sir wanted to discuss a few things with you regarding design of custom cyclone v board. Please tell when you are available for a call.
Regards,
Akash.
----- Original Message -----
From: Akash Gupta <akash.deal@gov.in>
To: jeetesh kumar tiwari <jeetesh.kumar.tiwari@intel.com>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Sent: Fri, 10 Nov 2023 17:55:29 +0530 (IST)
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi,
The board does not hang on the said line. It restarts automatically. The log I've attached is without any keyboard input or power button press.
I am using putty on Ubuntu 18.04.
Regards,
Akash.
----- Original Message -----
From: jeetesh kumar tiwari <jeetesh.kumar.tiwari@intel.com>
To: Akash Gupta <AKASH.DEAL@GOV.IN>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Sent: Fri, 10 Nov 2023 15:17:07 +0530 (IST)
Subject: RE: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
Is your board automatically restarted or stopping in between and is it hanging at “[ 1.542258] Synopsys Designware Multimedia Card Interface Driver”.
My side this same image is working fine on Altera Cyclone V SoC kit. Log Attached in email.
Also, Which serial terminal you are using e.g. putty or Hercules or any other utility.
Regards
Jeetesh
From: Akash Gupta <akash.deal@gov.in>
Sent: Friday, November 10, 2023 2:11 PM
To: Tiwari, Jeetesh Kumar <jeetesh.kumar.tiwari@intel.com>
Cc: JS HYANKI <js.hyanki.deal@gov.in>
Subject: Re: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Jeetesh,
Thanks for the image. I was able to boot linux on Altera SoCDK but it seems to stuck in a loop for me. For setting up the board pin config, I followed this link.<https://www.rocketboards.org/foswiki/Documentation/AlteraSoCDevelopmentBoardSoftwareGettingStarted>
As it seems, the boot processes is stuck in a loop. I have attached the log from my putty terminal. I will try for custom board later this week, and will update you by 17.10.23.
Regards,
Akash Gupta.
________________________________
From: "jeetesh kumar tiwari" <jeetesh.kumar.tiwari@intel.com<mailto:jeetesh.kumar.tiwari@intel.com>>
To: "Akash Gupta" <AKASH.DEAL@GOV.IN<mailto:AKASH.DEAL@GOV.IN>>
Sent: Friday, November 10, 2023 10:49:46 AM
Subject: Altera Cyclone V SoC development kit-Ready Linux Images
Hi Akash,
As discussed over phone, please download the files from the below shared details- Secureftp.intel.com - Sign In - FileTransferWebUI<https://secureftp.intel.com/secureftp>
Username: tmp04946
Password: Akash@123
Host Name: secureftp.intel.com
Server/Protocol Type: FTP/SSL (AUTH_SSL, AUTH_TLS, or Explicit SSL/TLS)
Mode: Passive
Port: 21
Let us know if you are able to download.
Regards
Jeetesh
--
Akash Gupta,
Sc-B, DEAL (DRDO)
Raipur Road, Dehradun - 248001 (INDIA)
+91 (135) 222 3016 | akash.deal@gov.in
--
Akash Gupta,
Sc-B, DEAL (DRDO)
Raipur Road, Dehradun - 248001 (INDIA)
+91 (135) 222 3016 | akash.deal@gov.in
--
Akash Gupta,
Sc-B, DEAL (DRDO)
Raipur Road, Dehradun - 248001 (INDIA)
+91 (135) 222 3016 | akash.deal@gov.in