Linking of two FPGA

I agree with Rysc. Start with what interface is available on board for connecting two boards (and hence two FPGAs). Then look for what will be the maximum data transfer rate (and hence clock rate) required to meet the design requirements. If the board-to-board interface options meet your data transfer rate requirements then you can select any of the protocols to implement FPGA-to-FPGA communication. E.g., if it's a slow speed connection, you can use UART using two data lines + GND only to communicate between two FPGAs. If you need high speed, then you can use LVDS or some other tranceivers with standard or custom protocol, provided the board and the FPGA supports it.