Linking of two FPGA

Technically, you can connect FPGA's anyway you want. SPI, I2C, PCI, PCI Express, LVDS, DDR, etc. (I know I'm confusing protocol standards with IO standards and what not...) My guess is you're not designing the board, and the decision is probably already decided for you, at least at the physical layer. What type of physical connections are there between the boards? Once you have that, you need to decide how they interact? Do they need to send data back and forth within a clock cycle, or is it purely a data dump from one side to the other? Do you need any sort of error correction/protection, in case the wires get noisy?

My guess is it will be as simple as possible, whereby you connect as many wires as you physically can, depending on how much data you'll be sending, and then just send one bit of data per clock, assuming the clock speed is slow enough and there is a relationship between the clocks on the two FPGAs.