Forum Discussion
Altera_Forum
Honored Contributor
7 years agohI,
I generated qsys component from beginning and obtained the same license error:...x_ctrl/synthesis/submudules/x_ctrl_cpu_cpu.v is OpenCore Plus time-limited file. Remove the unlicenses cores or obtain license for those OpenCore Plus time-limited IP cores. The file from the error message is altera's file. I used in QSYS file except my own component: clock,niosII,jtag_uart,ram,PIO-led,PIO-pb,sysid. In my component I used counter IP only. I didn't use any others IP include OpenCore IPs. Best Regards,Tgel111