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Altera_Forum's avatar
Altera_Forum
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12 years ago

KSZ8851SNL 10/100 Mbps Ethernet

Hello Guys,

i am trying to interface KSZ8851SNL ethernet MAC with Cyclone III FPGA in order to download data. The send and receive functions are all fine and i implement my own TCP/IP stack as well. while the system is in monitoring stage, (Slow send and receive) it is still fine. however, while i am trying to download a file the receive unit in KSZ8851SNL kind of crashes. have you had any experiences working with this MAC. I tried everything and working on that for couple of weeks and it doesn't work. I really appreciate your feedbacks.

regards,

Aidin.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    12 years ago

    thanks for the response. the receive buffer is 12 KB long and with high speed data download it crashes. I managed to figure it out the problem. it was wrong SPI timing and also poor signal integrity. by looking at those, it works fine.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hello. You were able to come up with an FPGA design to control this chip? I'm looking to do the same thing. Do you just ping the TX and RX fifos with the interrupts for incoming packets? The document for the part kind of stinks, but do you have something better for reference?

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    yeah, it was a bit difficult but I did it. I am checking the number of packets rather than interrupts. also, KSZ is a bit slow and you should give enough time to send a packet otherwise simply crashes. I implement most part in FPGA (TCP/IP Stack) in HDL and it is pretty cool. although it is too fast for KSZ , we will use faster Ethernet controller in future . Hope this helps

  • deepak_7's avatar
    deepak_7
    Icon for New Contributor rankNew Contributor
    1 year ago

    Can you send the intialization sequence and receiving sequence code for KSZ8851SNL Module