Forum Discussion
ManthanWankar
New Contributor
2 years agoKernel restart issue while trying to read or write from the address space of hps2fpga and lwhps2fpga
Currently working on a Arria 10 FPGA and faced this issue while trying to access the gpio connected on the lwhps to fpga bridge but when i try to access the lwhps2fpgs address section(0xff200000) my...
aikeu
Regular Contributor
2 years agoHi ManthanWankar,
I was able to execute bridge enable in Uboot user space using GSRD build and can detect the same sys id from the System ID Peripheral Intel FPGA IP which connected to 0xFF200000.
If I didnt perform bridge enable, the system will reset/restart after I execute md 0xFF200000 in Uboot user space.
May I know which device tree file which you change for uboot referring to the link below:
https://github.com/altera-opensource/u-boot-socfpga/tree/socfpga_v2023.01
Is it possible to compare/test with GSRD before any changes being made?
Thanks.
Regards,
Aik Eu
ManthanWankar
New Contributor
2 years agothis is the dtsi where i changed the memory size and added bridge definations