Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThe only cause I can see is that an error occured during the FPGA configuration, but it's strange that Quartus doesn't detect it.
There could also be a problem with one of the power supplies or a bad decoupling but I'm not sure it would prevent the COND_DONE pin from going high. Do you have another design that you can test?