New ContributorJTAG USER1 register on Max 10
We instantiated a JTAG USER1 register in a Max II device by using this built-in component (VHDL):
component maxii_jtag
PORT (
tms : in std_logic;
tck : in std_logic;
tdi : in std_logic;
tdouser : in std_logic;
tdo : out std_logic;
tmsutap : out std_logic;
tckutap : out std_logic;
tdiutap : out std_logic;
shiftuser : out std_logic;
clkdruser : out std_logic;
updateuser : out std_logic;
runidleuser : out std_logic;
usr1user : out std_logic);
end component;
We just needed a couple more lines of VHDL code to instantiate our USER1 register.
We are converting it to a Max 10 device, but this component does not exist. How do we do this (simply) with a Max 10 device?
Please use the fiftyfivenm_jtag component for MAX 10.
Refer Intel MAX 10 FPGA Configuration User Guide: https://www.intel.com/content/www/us/en/programmable/documentation/sss1393988509894.html
Regards
