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It would help if you said how your address appears to be getting messed up.
I'm guessing that the address provided by the master it is shifted right by one bit when it arrives at the slave (it's a 16 bit slave on a 32 bit master). The byteenables will be 11 if the master did a 16 bit access (or larger), 01 or 10 if the master did a byte access.
For a 16 bit slave you can shift the word address left by one bit and use ~byteenable[0] at your least significant byte address bit. It's a little more complex for 32 bit slaves.
I think there is a way to ask for byte addresses but I can't find it right now.
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Thank you so much. This is what is happening internally with the addresses.
For the master_read_16 commands--
Master address = 0x00 ……………………………. Slave address = 0x00
Master address = 0x04 ……………………………. Slave address = 0x02
Master address = 0x08 ……………………………. Slave address = 0x04
Master address = 0x0C ……………………………. Slave address = 0x06
For the master_write_16 commands--
Master address = 0x00 ……………………………. Slave address = 0x02
Master address = 0x04 ……………………………. Slave address = 0x04
Master address = 0x08 ……………………………. Slave address = 0x06
Master address = 0x0C ……………………………. Slave address = 0x08
I get it that the address provided by the master it is shifted right by one bit when it arrives at the slave. This is indeed happening when I perform master_read_16. But when for master_write_16 this is not true. Why is the internal address mapping different for reads and writes?
Also Byteeable is always 00 while write operation. Is that right?
Also it seems like if I only create a 2 bit byteenable for the slave and do not set master byteenable to 0011 ( I do not know how to set it), this is exactly same as having no byteenable in the slave. Probably that make it native addressing and not dynamic.
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