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This is a board I've made myself.
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Ok.
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I checked the CONF_DONE output. During programming it goes low, and after programming it goes high.
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So the FPGA configured Ok. The problem must be in your code, or assignments.
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The pin planner looks right. Except I'm using a 3.3V supply for all the VCCIO banks and in the pin planner I see the banks which have not been used have defaults set to 2.5V and have not been changed (I don't know how to change them without associating an output pin to the bank). I tried changing the text file and setting all the VCCIO's to 3.3V manually but I'm not sure if it actually applied the changes in the next programming. I'm not sure if this could be a reason for my problem.
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Nope, that will be fine. There are GUI and Tcl settings that can be used to set the default voltage.
Email me a zip file containing your Quartus project and I'll see if I can see what is wrong (use my forum name as the email address).
Cheers,
Dave
Honored Contributor
