Forum Discussion
Altera_Forum
Honored Contributor
14 years agoYou are saying that
"For the EPCS interface, I used to read a VCCIO suggestion of 3.3V for the respective bank" I cant do that. In this design the FPGA(related bank) has to work at 2.5 V. Assuming FPGA VCC is 2.5V what is your suggestion about a) Voltage of pin 4 (should I keep 3.3) b) Voltage of EPCS64 (Should I keep 3.3)