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So with the pin 8 line being left floating on the board and with appropriate buffering and pulling TDO line high with say a 10K resistor I should have a working programming interface between FPGA and USB-Blaster?
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Yes.
If you are going to the trouble of buffering the inputs, then also buffer the TDO output, or at least put a 100-ohm series resistor in the path to provide some form of ESD protection (the TDO trace would go from the FPGA, to the pull-up, then through the series resistor to the JTAG connector).
Why go to this trouble? Well, the JTAG connector is the one place a user can get their electrostatically charged fingers!
Cheers,
Dave