JTAG design for cyclone iii ep3c5E144

nCE function is related to the AS/AP configuration interface. It's purpose is to tristate the FPGA signals driving a configuraton memory. It can be tied to GND if no external access to a configuration memory (through AS programming connector or embedded processor) is intended.

Your design is missing 1.2V and 2.5V supplies. Both are required by the Cyclone 3 FPGA, read the device manual. Furthermore bypass capacitors at all power supply pins are strongly suggested.

I would always add a serial configuration flash (EPCS or compatible) to the design. It can be programmed through JTAG indirect method.

A single clock input is sufficient for most basic designs.