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Altera_Forum
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17 years ago

JTAG configuration protocol specification

Hello, We're in the process of debugging a JTAG configuration problem (Quartus doesn't recognize the chain that consists of a single CycII device). We try to look at the TDI, TMS, TCK, TDO line...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

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3 boards may seem a hardware problem at a first glance. But once I had a problem with a defective batch of CPLDs which interrupted the JTAG chain. I have noticed this problem by replacing the CPLD with another one removed from a correctly working board.

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Yes, replacing the FPGA with one from a working board came up. BGA packages make it more challenging, however.