Forum Discussion
Altera_Forum
Honored Contributor
16 years agothe jtag part of the device uses the voltages you provide with your design.
for example if your gnd level gets shifted due to undervoltages then part of or the complete device may fail. i would go for 4 layer pcb minimum. top layer vccio PLANE ! gnd PLANE ! bottom layer with vint and vca and some tracks remember to draw the power supply first make the tracks as short and wide as possible try to avoid that you combine tracks that go to one via somewhere on you pcb. instead go as soon as possible into your internal layer. the internal layer must be planes and not tracks. so you have the possability to place bigger caps and more caps with short tracks and more than one via to these layers what helps you to control your voltages. those tracks from your LDO to the destination pins were too smal and too long. place the LDO closer to the fpga. these are only a few basics