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Altera_Forum
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16 years ago

JTAG configuration error in CycloneIII

Hi The last week I wrote a post about a problem with the configuration of the EP3C5E144C8N cycloneIII FPGA: ------------- I´m trying to program a EP3C5E144C8N FPGA in JTAG mode using a ByteBla...
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Altera_Forum
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16 years ago

Hi MSchmitt

Yes, my pcb design is two layers, any problem with this kind of layout?

I attached here the layout..

Thanks