Forum Discussion
Hi Aiman,
I would describe my setup once again.
As I mentioned in previous posts, we are not using JAM player from the pc.
We are using JAM player from an embedded MCU.
To load program from quartus, we use the .pof file with the programmer and USB blaster II
The program is ported to the embedded target and we have four pins connected to the MAX10 to program the FPGA.
After you shared the tip about the ISP option, I tried two options:
1. Disabled the ISP and generated the JAM file and converted it to a hex file and used it to program the FPGA.
I get the exit code 10 as mentioned before. The image in fpga is unaffected.
2. Enabled the ISP and used the generated the JAM file to program the FPGA. I got exit code 0!! from both Program and Verify action.
After power cycling though, I saw the FPGA logic is absent and it is at the reset state.
So did the above option just erase the flash? In that case, why would I get successful programming confirmation from JAM player?
Or do I need to try something else to transfer the logic to SRAM if I use the ISP option?
Regards
Jay