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VMich4's avatar
VMich4
Icon for New Contributor rankNew Contributor
6 years ago

I've a problem with PCIe in Arria10. Сoreclkout_hip = 0!

We have developed a module with installed FPGA Arria 10. FPGA - 10Ax022E4F29i3. In the project we use IPCore Pcie (HardIP). Refclk (100MHz) is detected inside FPGA (SignalTap "sees"). But on the outp...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

Hi sir,

Can you please elaborate on this sentence?

STP used diff. freq - 100 ref_clk from input, 62,5 MHZ from other pin. nothing.... And reset_status = 1!!

Does it mean ref clock is 100Mhz, other pin with 62.5Mhz is for which signal? And 'nothing' is referring to what?