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imuguruza's avatar
imuguruza
Icon for New Contributor rankNew Contributor
2 years ago

Issue with Cyclone 10 LP PLL

Hi there, I am working in a bring-up of a board that contains a Cyclone 10 LP FPGA. I am trying to use the 2x PLLs that the FPGA contains. I have generated from the 100MHz input clock, 2x 200KHz u...
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imuguruza's avatar
imuguruza
Icon for New Contributor rankNew Contributor
2 years ago

I can confirm that the input clokc is working fine, as I have used it to toggle LEDs using a counter module.

I am wondering if it is mandatory to have an isolated analog reference plane in the PCB as stated in doc an958:

In my design, we only have a ferrite to isolate VCC_PLL but we have not created an isolated GNDA, it is tied to digital ground.

  • FvM's avatar
    FvM
    Icon for Super Contributor rankSuper Contributor
    2 years ago
    Hope you have also bypass capacitors next to VCC_PLL and other supply pins.
    Power integrity is hardly a problem unless your PCB has many fast switching outputs.