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CS72's avatar
CS72
Icon for New Contributor rankNew Contributor
2 years ago
Solved

is there the same silicon chip used in different housings

Hi, if one can buy the same size in different housings, will the chip be the same for the housing with lowest and highest Pin Count? Would e.g. same silicon chip being housed in 484Pin BGA (i.e. h...
Fpga Devkit
Generic Io
  • WZ2's avatar
    WZ2
    2 years ago

    Hi there,

    I wanted to check if you have any further questions or concerns. If not, I will go ahead and mark this issue as resolved.

    Additionally, we would greatly appreciate it if you could take a moment to fill out our survey. Your feedback is valuable to us and helps us improve our support quality.

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    WZ


WZ2's avatar
WZ2
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi there,

Yes, I believe the differences may occur in the instantiation of resource distribution and routing variations. However, these data themselves cannot be reverse-analyzed for resolution. Since such use cases are rare and there are no precedents, nor any forward analysis data or experience available for reference, my suggestion is to experiment to verify.

Of course, before proceeding with a major project burn, you can first select a few I/Os (please confirm if there are test pins on the board) for speculative validation, while ensuring to avoid damage during the process.

Best regards,

WZ