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DNewm1's avatar
DNewm1
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5 years ago

Is there any way to connect a signal to a PLL in a Max 10 without using a dedicated clock input?

Customer has protos built already but did not route clock signals to dedicated clock inputs, and they need to use the PLLs. Is there any way at all to get to the PLLs from regular I/O? Or from the ...
EngWei_O_Intel's avatar
EngWei_O_Intel
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5 years ago

Hi Danny

Any update for this issue?

Thanks.

Eng Wei

  • DNewm1's avatar
    DNewm1
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    5 years ago

    Hi Eng Wei

    They were able to do a quickturn respin and reassign the signal to a clock pin. Unfortunately they also happened to choose a less-than-ideal clock pin (i.e. one that does not allow a direct route to the single pll in this device so hopefully the design can tolerate the jitter performance).

    Thanks for you help
    Danny