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DNewm1's avatar
DNewm1
Icon for New Contributor rankNew Contributor
5 years ago

Is there any way to connect a signal to a PLL in a Max 10 without using a dedicated clock input?

Customer has protos built already but did not route clock signals to dedicated clock inputs, and they need to use the PLLs. Is there any way at all to get to the PLLs from regular I/O? Or from the ...
EngWei_O_Intel's avatar
EngWei_O_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi Danny

If it is still in the design phase, we encourage user to follow the guideline to properly route the clock pin to avoid any impact to the functionality and performance..

In parallel, I got the response from internal team that it requires a dev-spec change approval to release the workaround (if the workaround is available for Max 10). And in order to initiate a dev-spec change, we will need a business impact justification.

Thanks.

Eng Wei