Forum Discussion
Hi Sir,
You may refer to the following link for the Arria 10 Low latency 10G MAC example design. This should be helpful for you to use it as the starting point for your design development.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-20016.pdf
Regards -SK
Thanks @SengKokL_Intel ,
Sory but I'm really a newbie to FPGA world!!
I have checked the ug-20016 "4. 10GBASE-R Ethernet Design Example for Intel Arria 10" ,and tried to generate an design example using the Platform Designer (with Quartus Pro 19.2).
And this generated project can be compiled ok in Quartus Pro 19.2. But in Platform designer, I select "No development kit" option.
I have a Intel A10SOC Evaluation Board on hand, and If I wanto run my 10GE test project on it ? HOw should I do in next step ?
( I guess I should assign the correct pin-assignmnt in my project according to A10SOC Board, anythings else ? )
Thanks in advance