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Altera_Forum
Honored Contributor
16 years agoAre there any example designs that actually use the ASMI_ACCESS_REQUEST pin? It's always ignored in the application notes.
I have a few assumptions regading use of serial flash loader with user interface enabled: 1) if we don't really need to program the EPCS while the FPGA is configured and running, then we can simply never give it a grant. In that case the SFL simply gives our logic a means to access the EPCS 2) if JTAG is connected and attempts to program the EPCS then it is somehow connected, invisibly, to the block and causes the amsi_access_request signal to go true, and waits for a grant. Once granted, JTAG can program the EPCS