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Although a C3 FPGA device doesn't draw more than 1A on Vccint after power-up, it is probably a good idea to design the Vccint rail up to 2-3A for in-rush current. Linear regulators will end up with big heat sinks. I will use TI TPS75003RHLR to provide 3.3V, 2.5V and 1.2V from a 5V rail. I think that 1.2V +-5% should be acceptable in any case as long as it is stable and clean.
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Hmm, that's a pretty good call. Soldering will be fun, but I believe our tech could probably handle a QFN. I'll have to ask him.
Is the max inrush stated anywhere? I check the handbook, and couldn't find that figure.
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