Forum Discussion
Altera_Forum
Honored Contributor
16 years agoThis is probably a limitation of the soft LVDS Megafunction, that uses DDIO cells for both data and clock outputs for optimal performance. The DDIO cells are located inside the MegaFunction and the designer most likely didn't provide an option to duplicate them. A modfied soft LVDS logic would be needed. Basically you can build it yourself using DDIO primitives.